This invention relates generally to a non-linear function generating circuit and method and more particularly to digital non-linear function generating circuits and methods.
As is known in the art, many applications require that a non-linear function of a signal be generated. One circuit used for this purpose is shown in FIG. 1 to generate a square root function of an input signal, X. The circuit includes an analog multiplier M in a negative feedback loop provided around an operational amplifier A. The analog input signal, X, is fed to the non-inverting input of the amplifier A. The output Y of the amplifier A is fed to the pair of inputs of the multiplier M. Thus, the output of the multiplier M produces a signal representative of Y.sup.2. The output Y.sup.2 is fed to the inverting input of the amplifier A. With a large amplifier gain, in the steady state the output will be equal to: EQU X
Such method is described on page 40 of Nonlinear Circuits Handbook, Dan Sheingold, Analog Devices, Inc.
Digital circuitry has been used to determine the square root of an input signal. One technique is described in Digital Signal Processing Applications", Prentice-Hall, 1990 [ISBN 0-13-212978-7], Section 4.4, page 57, which describes an approach based on a Taylor series expansion of the square root function. This algorithm is open loop and the square root value is available after each evaluation of the polynomial.
Another approach using a closed loop, iterative, algorithm is shown in U.S. Pat. No. 4,298,951, issued Nov. 3, 1981, entitled "Nth Root Processing Apparatus", inventor Hall.